
64
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.3
Fig. 8.11.4 Block Control Register i
b7 b6 b5b4 b3 b2 b1 b0
Block control register i (BCi) (i=1, 2) [Addresses 00D2
16
and 00D3
16
]
Block Control register i
0, 1 Display mode
selection bits
(BCi0, BCi1)
(See note 1)
Indeterminate
2, 3 Dot size selection
bits (BCi2, BCi3)
b4 b3 b2
Pre-divide Ratio
Dot Size
4 Pre-divide ratio
selection bit (BCi4)
5
7 Window top/bottom
boundary control bit
(BCi7)
Notes 1: Bit RA3 of OSD RAM controls OUT1 output when bit 5 is “0.”
Bit RA3 of OSD RAM controls OUT2 output when bit 5 is “1.”
2: Tc is OSD clock cycle divided in pre-divide circuit.
3: H is H
SYNC
.
OUT1/OUT2 output control
bit (BCi5) (See note 1)
0: OUT1 output control
1: OUT2 output control
6
Vertical display start
position control bit
(BCi6)
BC16: Block 1
BC26: Block 1
b1 b0
0 0: Display OFF
0 1: CC mode
1 0: OSD mode (Border OFF)
1 1: OSD mode (Border ON)
00
01
10
11
00
01
10
11
0
1
✕ 2
✕ 3
1Tc ✕ 1/2H
1Tc ✕ 1H
2Tc ✕ 2H
3Tc ✕ 3H
1Tc ✕ 1/2H
1Tc ✕ 1H
2Tc ✕ 2H
3Tc ✕ 3H
BC17: Window top boundary
BC27: Window bottom boundary
B Name Functions
After reset
RW
RW
Indeterminate
RW
Indeterminate
RW
Indeterminate
RW
Indeterminate
RW
Indeterminate
RW
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