Renesas R0E572110CFK00 Technické informace stáhnout pdf (Strana 77)

7. The AUD trace is disabled while the profiling function is used.

8. If breaks occur immediately after executing non-delayed branch and TRAPA instructions and

generating a branch due to exception or interrupt, a trace for one branch will not be acquired

immediately before such breaks.

However, this does not affect on generation of breaks caused by a BREAKPOINT and a break

before executing instructions of Event Condition.

3.2.3 Notes on Using the JTAG (H-UDI) Clock (TCK) and AUD Clock (AUDCK)

1. Set the JTAG clock (TCK) frequency to less than the frequency of the MCU peripheral module

clock (CKP) and 10 MHz or lower.

2. The initial value of the JTAG clock (TCK) is 2.5 MHz.

3. A value to be set for the JTAG clock (TCK) is initialized after executing [Reset CPU] or

[Reset Go]. Thus the TCK value will be 2.5 MHz.

4. Set the AUD clock (AUDCK) frequency to 50 MHz or lower. If the frequency is higher than

50 MHz, the emulator will not operate normally.

3.2.4 Notes on Setting the [Breakpoint] Dialog Box

1. When an odd address is set, the next lowest even address is used.

2. A BREAKPOINT is accomplished by replacing instructions of the specified address.

It cannot be set to the following addresses:

• An area other than CS and the internal RAM

• An instruction in which Event Condition 2 is satisfied

• A slot instruction of a delayed branch instruction

3. During step operation, the specified BREAKPOINT and Event Condition breaks are disabled.

4. When execution resumes from the address where a BREAKPOINT is specified and a break

occurs before the Event Condition execution, single-step operation is performed at the address

before execution resumes. Therefore, realtime operation cannot be performed.

5. When a BREAKPOINT is set to the slot instruction of a delayed branch instruction, the PC

value becomes an illegal value. Accordingly, do not set a BREAKPOINT to the slot

instruction of a delayed branch instruction.

6. If a BREAKPOINT cannot be correctly set to an address in the ROM or flash memory area, a

mark z will be displayed in the [BP] area of the address on the [Source] or [Disassembly]

window by refreshing the [Memory] window, etc. after Go execution. However, no break will

occur at this address. When the program halts with the break condition, the mark z disappears.

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Renesas R0E572110CFK00 Technické informace Strana 77