
21
SH7211
1
AUDATA0
AUDATA2
AUDATA1
AUDATA3
TCK
TMS
AUDSYNC
N.C.
N.C.
RES
TDI
TDO
TRST
ASEBRKAK
/ASEBRK
UVCC
GND
Reset signal
1 kΩ
GND
GND
GND
(GND)
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
2
4
6
8
12
10
14
16
18
20
22
24
26
28
30
32
34
36
AUDATA0
AUDATA2
AUDATA1
AUDATA3
TCK
RES
TMS
TDO
TDI
TRST
ASEBRKAK/ASEBRK
AUDCK
AUDSYNC
AUDCK
N.C.
PVcc
ASEMD
PVcc
PVcc
PVcc
All pulled-up at 4.7 kΩ
User system
PVcc = I/O power supply
H-UDI port connector
(36-pin type)
*
*
*
*
*
Note:
Dumping resistance (33 Ω).
Figure 2.11 Recommended Circuit for Connection between the H-UDI Port Connector and
MCU when the Emulator is in Use (36-Pin Type)
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