Renesas R8C/15 manuály

Renesas R8C/15 Technické informace (42 strany)

Značka: Renesas | Kategorie: Sítě | Velikost: 0.65 MB |

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To our customers

1

1. Overview

3

R8C/14 Group, R8C/15 Group

3

1.2 Performance Overview

4

1.3 Block Diagram

6

Type No. R 5 F 21 14 4 D SP

7

Type No. R 5 F 21 15 4 D SP

8

1.5 Pin Assignments

9

1.6 Pin Description

10

2.8.10 Reserved Bit

14

3. Memory

15

3.2 R8C/15 Group

16

REJ03B0102-0200

18

Table 4.2 SFR Information(2)

18

Table 4.3 SFR Information(3)

19

Table 4.4 SFR Information(4)

20

5. Electrical Characteristics

21

Erase-Suspend Request

25

(Maskable interrupt Request)

25

SSO(Output)

30

SSI(Input)

30

VCC = 5V

34

VCC = 3V

38

Package Dimensions

39

RENESAS SALES OFFICES

42

Renesas R8C/15 Technické informace (279 strany)

Značka: Renesas | Kategorie: Sítě | Velikost: 3.79 MB |

Angličtina

Tabulka s obsahem

To our customers

1

R8C/14 Group

3

R8C/15 Group

3

How to Use This Manual

5

3. M16C Family Documents

6

Table of Contents

7

10. Protection 55

9

11. Interrupt 56

9

12. Watchdog Timer 78

9

13. Timers 83

9

14. Serial Interface 125

10

16. A/D Converter 168

10

18. Flash Memory Version 191

11

20. Precautions 235

11

SFR Page Reference

13

R8C/14 Group, R8C/15 Group

15

1. Overview

15

1.2 Performance Overview

16

1.3 Block Diagram

18

Type No. R 5 F 21 14 4 D SP

19

Type No. R 5 F 21 15 4 D SP

20

1.5 Pin Assignments

21

1.6 Pin Description

22

2.8.10 Reserved Bit

26

3. Memory

27

3.2 R8C/15 Group

28

Table 4.2 SFR Information(2)

30

Table 4.3 SFR Information(3)

31

Table 4.4 SFR Information(4)

32

5. Reset

33

to P3_5, P3_7 Input Port

34

to P4_7 Input Port

34

5.1 Hardware Reset

35

5.1.2 Power on

35

Power Supply

36

Voltage Detection

36

5.2 Power-On Reset Function

37

5.3 Voltage Monitor 1 Reset

38

5.4 Voltage Monitor 2 Reset

38

5.5 Watchdog Timer Reset

38

5.6 Software Reset

38

6. Voltage Detection Circuit

39

Figure 6.5 VW1C Register

43

Figure 6.6 VW2C Register

44

6.1.1 Monitoring Vdet1

45

6.1.2 Monitoring Vdet2

45

6.2 Voltage Monitor 1 Reset

46

7. Processor Mode

49

Figure 7.2 PM1 Register

50

9. Clock Generation Circuit

52

Figure 9.2 CM0 Register

54

Figure 9.3 CM1 Register

55

Figure 9.4 OCD Register

56

Figure 9.5 HRA0 Register

57

9.1 Main Clock

59

9.2 On-Chip Oscillator Clock

60

9.4 Power Control

62

9.4.1 Normal Operating Mode

62

9.4.2.4 Exiting Wait Mode

64

9.4.3 Stop Mode

65

9.4.3.1 Entering Stop Mode

65

9.4.3.3 Exiting Stop Mode

65

10. Protection

69

11. Interrupt

70

11.1.2 Software Interrupts

71

11.1.2.2 Overflow Interrupt

71

11.1.2.3 BRK Interrupt

71

11.1.5.1 Fixed Vector Tables

73

11.1.6 Interrupt Control

75

Figure 11.4 INT0IC Register

76

11.1.6.1 I Flag

77

11.1.6.2 IR Bit

77

11.1.6.4 Interrupt Sequence

78

Instruction in

79

11.1.6.7 Saving a Register

80

11.1.6.9 Interrupt Priority

81

Level 0 (default value)

82

11.2 INT Interrupt

83

11.2.1 INT0 Interrupt

83

11.2.2 INT0 Input Filter

84

Timer X Mode Register

85

11.2.4 INT3 Interrupt

86

Figure 11.16 TCC1 Register

87

11.3 Key Input Interrupt

88

Figure 11.18 KIEN Register

89

11.4 Address Match Interrupt

90

12. Watchdog Timer

92

13. Timers

97

CNTRSEL=1

98

CNTRSEL=0

98

Figure 13.2 TXMR Register

99

REJ09B0164-0210

100

13.1.1 Timer Mode

101

13.1.2 Pulse Output Mode

102

13.1.3 Event Counter Mode

104

Input polarity selected to

112

Figure 13.12 TZMR Register

113

Figure 13.15 TCSS Register

116

13.2.1 Timer Mode

117

• When count starts

119

Timer Z Mode Register

127

PREZ=01h, TZPR=01h, TZSC=02h

128

13.3 Timer C

129

Timer C Register

131

Figure 13.27 TCC0 Register

132

Figure 13.28 TCC1 Register

133

Figure 13.29 TCOUT Register

134

13.3.1 Input Capture Mode

135

←Measurement value 1

136

←Measurement value 2

136

13.3.2 Output Compare Mode

137

14. Serial Interface

139

UART0 Bit Rate Register

141

Set to “001b”

145

14.2.2 Bit Rate

153

Figure 15.2 SSCRH Register

156

SS Control Register L

157

15.1 Transfer Clock

163

15.3 Interrupt Requests

166

15.5.2 Data Transmit

169

15.5.3 Data Receive

171

15.5.4 Data Transmit/Receive

173

I/O Pin and SS Shift Register

175

15.1.1 Association

175

15.6.2 Data Transmit

177

15.6.3 Data Receive

179

16. A/D Converter

182

16.1 One-Shot Mode

186

16.2 Repeat Mode

188

16.3 Sample and Hold

190

16.4 A/D Conversion Cycles

190

17. Programmable I/O Ports

193

P1_0 to P1_3

194

P1_6, P1_7

195

P3_4, P3_5, P3_7

195

P4_6/XIN

196

P4_7/XOUT

196

17.4 Port setting

200

17.5 Unassigned Pin Handling

204

18. Flash Memory Version

205

18.2 Memory Map

207

18.3.1 ID Code Check Function

209

Figure 18.4 OFS Register

210

18.4 CPU Rewrite Mode

211

18.4.1 EW0 Mode

212

18.4.2 EW1 Mode

212

Full Status Check

213

18.4.2.10 FMR40 bit

214

18.4.2.11 FMR41 bit

214

18.4.2.12 FMR46 bit

214

EW1 Mode Operating Procedure

217

→wait until oscillation

218

18.4.3 Software Commands

219

18.4.3.1 Read Array Command

219

18.4.3.4 Program Command

220

18.4.3.5 Block Erase

221

18.4.4 Status Register

223

18.4.5 Full Status Check

224

18.5 Standard Serial I/O Mode

226

18.5.1 ID Code Check Function

226

R8C/14, R8C/15

228

18.6 Parallel I/O Mode

230

SSO(Output)

240

SSI(Input)

240

VCC = 5V

244

VCC = 3V

248

20. Precautions

249

20.2 Interrupts

250

20.2.1 Reading Address 00000h

250

20.2.2 SP Setting

250

20.3 Clock Generation Circuit

253

20.4 Timers

254

20.4.1 Timers X and Z

254

20.4.2 Timer X

254

20.4.3 Timer Z

255

20.4.4 Timer C

255

20.5 Serial Interface

256

20.7 A/D Converter

258

20.8 Flash Memory Version

259

20.8.1 CPU Rewrite Mode

259

20.8.1.1 Operating Speed

259

20.8.1.3 Interrupts

259

20.8.1.9 Interrupt Request

260

Generation during Auto-erase

260

Operation in EW1 Mode

260

20.9 Noise

262

Debugging Emulator

265

Register Index

267

REVISION HISTORY

268

→ “INT1”

271

→ Figure 18.16

276

“8.16” → “8.56”

277

Rev.2.10 Jan 19, 2006

278

Renesas Technology Corp

278

Hardware Manual

279

Renesas R8C/15 Uživatelský manuál (18 strany)

Značka: Renesas | Kategorie: Sítě | Velikost: 0.17 MB |

Angličtina

Tabulka s obsahem

PRELIMINARY

1

1.2 Performance Outline

2

1.3 Block Diagram

3

°C to 85 °C

4

1.5 Pin Configuration

5

R8C/15 Group

6

1.6 Pin Description

7

Under development

8

2.8.10 Reserved Area

10

Figure 3.1 Memory Map

11

REJ03B0078-0010Z

12

Rev. Date

17

Description

17

Page Summary

17

RENESAS SALES OFFICES

18

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