
(c) 200 5. Renesas Technology Corp., All rights reserved. Page 1 of 2
Date: Apr.28.2005
RENESAS TECHNICAL UPDATE
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda -ku, Tokyo 100-0004, Japan
RenesasTechn ology Corp.
Product
Category
MPU&MCU
Document
No.
TN -SH7-A551A/E
Rev.
1.0
Title
Restrictions on dead time of the motor management
timer (MMT) in the SH7046 Series, SH7047 Series,
SH7104, SH7105, SH7106, SH7107, SH7108, and
SH7109
Information
Category
Technical Notification
Lot No.
Applicable
Product
SH7046 Series, SH7047 Series, SH7104,
SH7105, SH7106, SH7107, SH7108, and
SH7109 All lots
Reference
Document
SH7046 Series Hardware Manual
(ADE-602-237B Rev. 3.0)
SH -2 SH7047 Group Hardware Manual
(REJ09B0020-0200Z Rev. 2.0 )
Thank you for your consistent patronage of Renesas semiconductor products.
We would like to inform you of the following restrictions on the dead time of the motor management timer (MMT) in the
SH7046 Series, SH7047 Series, SH7104, SH7105, SH7106, SH7107, SH7108, and SH7109.
1. Phenomenon
A PWM waveform output may have a shorter dead time (no n-overlap time) than the time specified by the timer dead time
register (MMT_TDDR) or may have no dead time (a dead time of 0).
Note:* The same error is observed for the PVOA and PVOB pins or the PWOA and PWOB pins.
2. Conditions
This error occurs when the counter is restarted (setting the CST bit in TCNR to 1) after the counter is stopped by clearing the
CST bit in TCNR to 0 while the MMT repeats count up and count dow n.
Shorter dead time than specified
Output waveform when this error observed
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