Renesas Single-Chip Microcomputer SH7203 Technické informace stáhnout pdf (Strana 24)

Chapter 9. Headers

9.1. Application Headers

Table 9-1 to below show the standard application header connections. Table 9-5

Note: Switch ID is specified in brackets where the connection is via a DIP switch.

Note: Asterisk indications apply to all tables in this section

* marks pins where a link to the microcontroller pin is via an option link

** marks pins where the signal is only valid in 16 bit SDRAM mode

*** marks pins where a link to the microcontroller pin is via a 100R resistor and to BOARD VCC via a 4k7 resistor (100R ID & 4k7 ID)

JA1A and JA1B

Pin Header Name CPU board Signal

Name

Device Pin /

DIP S/W

Pin Header Name CPU board Signal

Name

Device Pin /

DIP S/W

1 5V CON_5V --- 2 0V (5V) GROUND ---

3 3V3 CON_3V3 --- 4 0V (3V3) GROUND ---

5 AVcc AVCC 114 6 AVss AVSS 120

7 AVref AVREF 116 8 ADTRG EXT_ADTRG 192 (SW5-10)

9 ADC0 AN0* 110 10 ADC1 AN1 111

11 ADC2 AN2 112 12 ADC3 AN3 113

13 DAC0 DA0* 118 14 DAC1 DA1* 119

15 IO Port0 LCD_DATA0_IO0 169 16 IO Port1 LCD_DATA1_IO1 167

17 IO Port2 LCD_DATA2_IO2 166 18 IO Port3 LCD_DATA3_IO3 165

19 IO Port4 LCD_DATA4_IO4 164 20 IO Port5 LCD_DATA5_IO5 163

21 IO Port8 LCD_DATA6_IO6 162 22 IO Port7 LCD_DATA7_IO7 161

23 IRQ3 EXT_IRQ3n 182 (SW6-2) 24 I

C Bus (3

pin) JA1_PIN24 ---

25 IIC_SDA SDA2*** 186 26 IIC_SCL SCL2*** 185

Table 9-1: JA1A / JA1B Standard Generic Header

JA2A and JA2B

Pin Header Name CPU board Signal

Name

Device Pin /

DIP S/W

Pin Header Name CPU board

Signal Name

Device Pin /

DIP S/W

1 RESn RESn 59 2 EXTAL CON_EXTAL

3 NMI NMIn 57 4 VSS1 VSS1 (GND) ---

5 WDT Overflow --- --- 6 SCIaTX TxD0 63

7 IRQ0 EXT_IRQ0 179 (SW6-9) 8 SCIaRx RxD0 49

9 IRQ1 EXT_IRQ1 180 (SW6-6) 10 SCIaCK JA2_PIN10 ---

11 UD MO_UD** 212 (SW7-3) 12 CTSRTS JA2_PIN12 ---

13 Up MO_Up** 193 14 Un MO_Un** 194

1 2 ... 19 20 21 22 23 24 25 26 27 28 29 ... 32 33

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