Renesas M16C/30P Uživatelský manuál stáhnout pdf (Strana 40)

M16C/30P Group 5. Electrical Characteristics

Rev.1.22 Mar 30, 2007 Page 38 of 53

REJ03B0088-0122

Figure 5.5 Timing Diagram (3)

Memory Expansion Mode, Microprocessor Mode

(Effective for setting with wait)

BCLK

HOLD input

HLDA input

· Measuring conditions :

· VCC1=VCC2=5V

· Input timing voltage : Determined with VIL=1.0V, VIH=4.0V

· Output timing voltage : Determined with VOL=2.5V, VOH=2.5V

P0, P1, P2,

P3, P4,

P5_0 to P5_2

(1)

(Common to setting with wait and setting without wait)

NOTES:

1. These pins are set to high-impedance regardless of the input level of the BYTE pin,

PM06 bit in PM0 register.

th(BCLK−HOLD)

tsu(HOLD−BCLK)

td(BCLK−HLDA)td(BCLK−HLDA)

Hi−Z

RDY input

tsu(RDY−BCLK)

th(BCLK−RDY)

BCLK

(Separate bus)

WR, WRL, WRH

(Separate bus)

VCC1=VCC2=5V

1 2 ... 35 36 37 38 39 40 41 42 43 44 45 ... 58 59

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