Renesas SH7709S Uživatelský manuál stáhnout pdf (Strana 18)

Rev. 1.0, 07/03, page 14 of 38

2.1.7 HM5225165B-B6 (4 Mwords × 16 bits × 4 banks)

Bus State Controller (BSC) Settings: When two SDRAMs (HM5225165B-B6) are connected to

area 3 of the SH7709S/SH7729R/SH7706 via a 16-bit bus, the bus state controller (BSC) must be

specified as summarized below. Table 2.5 lists the BSC register settings.

Note that the interface between the SDRAM and the SH7709S/SH7729R/SH7706 is performed

with bus clock = 66 MHz, CL = 2, TPC = 2, RCD = 2, TRWL = 1, and TRAS = 4.

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 43 44

Žádné komentáře

Renesas SH7709S Uživatelský manuál Strana 18