Renesas SH7709S Uživatelský manuál stáhnout pdf (Strana 41)

Rev. 1.0, 07/03, page 37 of 38

Table 2.14 BSC Register Settings (HM5257165B-A6)

Value

Address

Access

Size

Setting Value

Bus control register 1 BCR1 H'0000

FFFFFF60

16 H'0008

Bus control register 2 BCR2

3FF0

FFFFFF62

16 H'3FB0

Wait state control register 1 WCR1

3FF3

FFFFFF64

16 H'3FF3

Wait state control register 2 WCR2

FFFF

FFFFFF66

16 H'FFDF

Individual memory control

MCR H'0000

FFFFFF68

16 H'5274

PCMCIA control register PCR H'0000

FFFFFF6C

16 Need not be set

Refresh timer control/status

RTCSR H'0000

FFFFFF6E

16 H'A508

Refresh timer counter RTCNT H'0000

FFFFFF70

16 H'A500

Refresh time constant counter RTCOR H'0000

FFFFFF72

16 H'A57C

Refresh count register RFCR H'0000

FFFFFF74

16 Need not be set

Area 2 SDMR 

FFFFD000 to

FFFFDFFF

8 Need not be setSynchronous

DRAM mode

Area 3

FFFFE000 to

FFFFEFFF

Write any value

in address

H'FFFFE440*

MCS0 control register MCSCR0 H'0000

FFFFFF50

16 Need not be set

MCS1 control register MCSCR1 H'0000

FFFFFF52

16 Need not be set

MCS2 control register MCSCR2 H'0000

FFFFFF54

16 Need not be set

MCS3 control register MCSCR3 H'0000

FFFFFF56

16 Need not be set

MCS4 control register MCSCR4 H'0000

FFFFFF58

16 Need not be set

MCS5 control register MCSCR5 H'0000

FFFFFF5A

16 Need not be set

MCS6 control register MCSCR6 H'0000

FFFFFF5C

16 Need not be set

MCS7 control register MCSCR7 H'0000

FFFFFF5E

16 Need not be set

Notes: Bits not related to this interface example show initial values. All register settings must

be checked according to the user system.

* In area 3, the SDMR address is determined by adding H'FFFFE000 to the desired value

to be set in SDMR. The desired value can be set in SDMR by writing any value in this

address.

Figure 2.14 shows an interface circuit for the case in which area 3 of the SH7727 is connected to

SDRAM via a 16-bit bus. The address multiplex bits of MCR should be set as AMX[3:0] = 1110.

1 2 ... 36 37 38 39 40 41 42 43 44

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