Renesas H8S/2111B Uživatelský manuál stáhnout pdf (Strana 87)

100

101

Rev. 1.00, 05/04, page 53 of 544

3.2.2 System Control Register (SYSCR)

SYSCR selects a system pin function, monitors a reset source, selects the interrupt control mode

and the detection edge for NMI, pin location selection, enables or disables register access to the

on-chip peripheral modules, and enables or disables on-chip RAM address space.

Bit Bit Name

Initial

Value R/W Description

7 and 6 — All 0 R/W Reserved

The initial value should not be changed.

INTM1

INTM0

R/W

These bits select the control mode of the interrupt

controller. For details on the interrupt control modes

and interrupt control select modes 1 and 0, see

section 5.6, Interrupt Control Modes and Interrupt

Operation.

00: Interrupt control mode 0

01: Interrupt control mode 1

10: Setting prohibited

11: Setting prohibited

3 XRST 1 R External Reset

This bit indicates the reset source. A reset is caused

by an external reset input, or when the watchdog

timer overflows.

0: A reset is caused when the watchdog timer

overflows.

1: A reset is caused by an external reset.

2 NMIEG 0 R/W NMI Edge Select

Selects the valid edge of the NMI interrupt input.

0: An interrupt is requested at the falling edge of NMI

input

1: An interrupt is requested at the rising edge of NMI

input

1 2 ... 82 83 84 85 86 87 88 89 90 91 92 ... 581 582

Komentáře k této Příručce

Žádné komentáře

Renesas H8S/2111B Uživatelský manuál Strana 87

Komentáře k této Příručce

Související produkty a manuály pro Hardware Renesas H8S/2111B