
R8C/10 Group
Rev.1.20 Jan 27, 2006 page 27 of 180
REJ09B0019-0120
Figure 6.5 State Transition of Power Control
Figure 6.5 shows the state transition of Power control
6.4 Power Control
On-chip Oscillator
Mode
OCD2=1
CM14=0
CM05: Bit in CM0 register
CM10, CM13, CM14: Bit in CM1 register
OCD2: Bit in OCD register
High-speed Mode,
Middle-speed mode
OCD2=0
CM05=0
CM13=1
Reset
Wait Mode
WAIT InstructionInterrupt
Stop Mode
CM10=1
(All clocks stop)
Interrupt
CM14=0, OCD2=1
CM13=1, CM05=0,
OCD2=0
There are five power control modes.
(1) High-speed mode
(2) Middle-speed mode
(3) On-chip oscillator mode
(4) Wait mode
(5) Stop mode
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