Renesas R8C/Tiny Series Manuál stáhnout pdf (Strana 5)

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Table of Contents

SFR Page Reference

Chapter 1. Overview............................................................. 1

1.1 Applications ................................................................................................................... 1

1.2 Performance Overview.................................................................................................. 2

1.3 Block Diagram ............................................................................................................... 3

1.4 Product Information ...................................................................................................... 4

1.5 Pin Assignments............................................................................................................5

1.6 Pin Description .............................................................................................................. 6

Chapter 2. Central Processing Unit (CPU) ......................... 7

2.1 Data Registers (R0, R1, R2 and R3 ) ............................................................................. 7

2.2 AddressRegisters (A0 and A1) ...................................................................................... 8

2.3 Frame Base Register( FB )............................................................................................. 8

2.4 Interrupt Table Register (INTB )..................................................................................... 8

2.5 Program Counter (PC )................................................................................................... 8

2.6 User Stack Pointer (USP ) and Interrupt Stack Pointer (ISP )..................................... 8

2.7 Static Base Register (SB ) ............................................................................................. 8

2.8 Flag Register (FLG ) ....................................................................................................... 8

2.8.1 Carry Flag ( C Flag ) ................................................................................................................................8

2.8.2 Debug Flag ( D Flag ) .............................................................................................................................. 8

2.8.3 Zero Flag ( Z Flag ) ..................................................................................................................................8

2.8.4 Sign Flag ( S Flag )..................................................................................................................................8

2.8.5 Register Bank Select Flag ( B Flag ) .....................................................................................................8

2.8.6 Overflow Flag ( O Flag)...........................................................................................................................8

2.8.7 Interrupt Enable Flag ( I Flag ) ...............................................................................................................8

2.8.8 Stack Pointer Select Flag ( U Flag ).......................................................................................................8

2.8.9 Processor Interrupt Priority Level ( IPL ) ..............................................................................................8

2.8.10 Reserved Area .......................................................................................................................................8

Chapter 3. Memory ............................................................... 9

Chapter 4. Special Function Registers (SFR) .................. 10

Chapter 5. Reset .................................................................. 14

5.1 Hardware Reset ............................................................................................................14

5.2 Software Reset..............................................................................................................14

5.3 Watchdog Timer Reset ................................................................................................. 14

Chapter 6. Clock Generation Circuit.................................. 17

6.1 Main Clock.....................................................................................................................21

6.2 On-Chip Oscillator Clock ............................................................................................. 22

1 2 3 4 5 6 7 8 9 10 ... 198 199

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